Retrograde @Retrograde@oldbytes.space

I might have accidentally.

#newarrival #retròcomputing

Nothing like just having had the hottest July on record here and seeing people come out in the evening with their ̶w̶e̶e̶d̶ ̶b̶u̶r̶n̶e̶r̶s̶ flame throwers.

I mean, sure we're headed towards dramatic climate changes with more than a 2°C temperature increase, the 6th mass extinction is happening around us - but some things are just too essential to cut down on, and if we let ONE little green thing grow where there's supposed to be concrete and tarmac, it would mean the end of civilization!1

That about wraps up the monitor's A (assemble) command, I would say.

#65c02 #homebrewcomputer

(Hm, looking at that BBS7 instruction, I clearly also still need to implement a range check for the branch destinations! 😬​)

Been working on the 'A' ("assemble") command of the ROM monitor of my #65C02 #homebrewcomputer this week, and just unlocked the achievement of being able to assemble all the instructions and addressing modes of the R65C02. 🤓

The remaining stuff (such as automatically continuing at the next address) should be trivial compared to what is now working. Truth be told, I'm not all that happy with the implementation (which ended up being about 500 lines of assembler, incl. directives and a couple of tables specific to this command). I will rewrite it at some point, but for now there is plenty of space in the ROM and my main focus is bootstrapping this system. 😅

Albeit a little cumbersome, now there's actually enough functionality in the monitor to enter and run code!

(And yes, the register dump when returning from calling the entered program shows some wrong values - but that's another story.)

One should never risk running out of mouse pads.

Also, it *is* #C64month.

#retrocomputing

It's August - that means #C64month and this time with a 40 year anniversary no less! #retrocomputing

Better.

Disassembly now includes the address of each instruction as well as correctly calculating the destination addresses for forward and backward relative branches.

Last day (night) of vacation and back to work tomorrow, so I'll wrap it up for now.

All addressing modes are working, including the Rockwell specifics.

(For branches, I still need to convert relative addresses to effective addresses in the output, though.)

Decent progress with the Disassembly command in the ROM monitor for my #65c02 #homebrewcomputer.

Here is the monitor disassembling the ROM itself. 🤓​

Need to include addresses and data in the output as well, but this shows that the meat of the disassembly is working.

There is some flexibility in parsing, i.e. you can separate tokens with any amount of whitespace and use upper as well as lower case.

All commands are validated for the correct number of operands and values of those as well.

My #homebrewcomputer ROM monitor now supports the following commands:

R : Register dump
M [START] [END] [ROWS] [COLS] : Memory dump
? ADDR : Peek
! ADDR VAL [VAL]... : Poke
F START END [VAL] : Fill
T START END ONTO : Transfer
H START END VAL [VAL]... : Hunt

Feeling the constraints shaping the solution, I went back to single byte commands for simplicity, that cut almost 2/3s off the length of the parser+tables. This is all just short of 1.5K of code and a little more than 100 bytes of RO data (no fancy error messages! 😏​).

Next command will be D, disassemble - that will probably be a bit more interesting... 😅​

Working a little on the ROM monitor for my #65c02 #homebrewcomputer. Here's the first command - a simple memory dump - implemented.

Picked up another couple of thrift books for the #retrocomputing bookshelf.

Testing the hypothesis by pulling the data line to ground through a 10k resistor and it clearly shows that as the ROM is no longer driving the line, the voltage is discharging through the resistor.

Rev. 2 PCBs for my #homebrewcomputer arrived, getting rid of some bodge wires and incorporating qualifying the ROM and RAM selects with a delayed φ2 clock, using a DS1010-60 digital delay line.

As I was bringing up the new boards step by step, I thought I was seeing bus contention on the scope with the ROM inserted and running an IO cycle program. 😕​

Couldn't figure out how that could happen, as it only way would be to have the ROM drive the bus at the same time the CPU was writing.

Then I looked at the data line and the ROM /select line and it turns out the notch in the data line signal coincides with the ROM select being deasserted.

So I'll conclude that this is just the inherent capacitance of the bus that's floating the line after the ROM stops driving it, and not in fact a contention scenario. 😅​

#electronics #65c02